Are CSL Cell RAM Memories Set to Their Initial Values After All Types of Resets?

The Triscend Configurable System Logic (CSL) cells optionally support RAM and dual-port RAM functions. By default, RAMs are initialized with all zeros. However, a designer can specify an initial value for these RAM functions.

The initial value is loaded into the RAM after any reset that reprograms the CSL matrix, such as a Power-on Reset or a Configuration Reset. The CSL RAM functions are not re-initialized upon a System Reset or when just the processor is reset.

If application code relies on the RAM contents after a System Reset or processor reset, the application should re-initialize the RAM contents rather than depend on the INITV initial values. For example, if the application program expects the RAM contents to be reset after a System reset or processor reset, then the application program must guarantee that the CSL RAM blocks are re-initialized to zero. Such re-initialization is typically performed over the Configurable System Interconnect (CSI) bus. However, the re-initialization may also be done using only CSL logic.

The initial RAM values, or INITV values, are only guaranteed after a Power-on or Configuration Reset. Application programs executing on the A7 Configurable System-on-Chip (CSoC) family can check the reset status register (RMAP_RESET_STATUS_REG) to determine which type of reset occurred.